Advertisements
Advertisements
प्रश्न
Draw the schematic symbols for AND, OR, NOT and NAND gate
Advertisements
उत्तर
APPEARS IN
संबंधित प्रश्न
The logic gate which produces LOW output when one of the input is HIGH and produces
HIGH output only when all of its inputs are LOW is called _______.
(A) AND gate
(B) OR gate
(C) NOR gate
(D) NAND gate
You are given two circuits as shown in following figure, which consist of NAND gates. Identify the logic operation carried out by the two circuits.
(a)
(b)
Write the truth table for circuit given in figure below consisting of NOR gates and identify the logic operation (OR, AND, NOT) which this circuit is performing.
(Hint: A = 0, B = 1 then A and B inputs of second NOR gate will be 0 and hence Y=1. Similarly work out the values of Y for other combinations of A and B. Compare with the truth table of OR, AND, NOT gates and find the correct one.)
Write the truth table for the circuits given in following figure consisting of NOR gates only. Identify the logic operations (OR, AND, NOT) performed by the two circuits.
(a)
(b)
The arrangement given below represents a logic gate :
Copy the following truth table in your answer booklet and complete it showing outputs at C
and D.
| A | B | C | D |
| 0 | 0 | ||
| 1 | 0 | ||
| 0 | 1 | ||
| 1 | 0 |
You are given a circuit below. Write its truth table. Hence, identify the logic operation carried out by this circuit. Draw the logic symbol of the gate it corresponds to.
Identify the logic gate represented by the circuit as shown and write its truth table.
The output of an OR gate is connected to both the inputs of a NAND gate Draw the logic circuit of this combinaion of getes and write its truth table.
Let \[X = A \overline{ BC} + B\overline{ CA} + C\overline{AB } .\] Evaluate X for A = B = C = 1.
Show that \[AB + \overline {AB }\] is always 1.
The amplification factor of a triode operating in the linear region depends strongly on ____________ .
(i) Write the truth tables of the logic gates marked P and Q in the given circuit.
(ii) Write the truth table for the circuit.
Draw a diagram to show how NAND gates can be combined to obtain an OR gate. (Truth table is not, required)
Useful Constants and Relations:
| 1. | Charge of a proton | (e) | =1.6 × 10-19C |
| 2. | Planck's constant | (h) | = 6·6 × 10-34 Js |
| 3. | Mass of an electron | (m) | = 9·1× 10-31 kg |
| 4. | Permittivity of vacuum | (∈0) | =8 · 85 × 10-12 Fm-1 |
| 5. | `(1/(4pi∈_0))` | =9 ×109 mF-1 | |
| 6. | Permeability of vacuum | (μ0) | = 4π × 10-7 Hm-1 |
| 7. | `((mu_0)/(4pi))` | =1 × 10-7 Hm-1 | |
| 8. | Speed of light in vacuum | (c) | = 3× 108 ms-1 |
| 9. | Unified atomic mass unit | (u) |
= 931 MeV |
| 10. | Electron volt | (leV) | = 1.6 × 10-19 J |
You are given a circuit as shown in the figure, which consists of the NAND gate. Identify the logic operation carried out by the two. Write the truth table. Identify the gates equivalent to the tow circuit.
A radar is sending out pules of 1 micro second duration at interval of 100 micro-second. The range of the radar is
An oscillator is nothing but an amplifier with
The truth table for the following logic circuit is:
For the given circuit, the input digital signals are applied at terminals A, B, and C. What would be the output at terminal y?
Truth table for the given circuit (Figure) is ______.
Two car garages have a common gate which needs to open automatically when a car enters either of the garages or cars enter both. Devise a circuit that resembles this situation using diodes for this situation.
Write the truth table for the circuit shown in figure. Name the gate that the circuit resembles.
Draw the output signals C1 and C2 in the given combination of gates (Figure).
In the logic circuit shown in the figure, if input A and B are 0 to 1 respectively, the output at Y would be 'x'. The value of x is ______.
A logic gate circuit has two inputs A and B and output Y. The voltage waveforms of A, B and Y are shown below.
The logic gate circuit is ______.
Which of the following gives a reversible operation?
Which one of the following is the Boolean expression for NOR gate?
