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Computer Science 2 HSC Science (Computer Science) 12th Standard Board Exam Maharashtra State Board Syllabus 2026-27

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Maharashtra State Board 12th Standard Board Exam Computer Science 2 Syllabus - Free PDF Download

Maharashtra State Board Syllabus 2026-27 12th Standard Board Exam: The Maharashtra State Board 12th Standard Board Exam Computer Science 2 Syllabus for the examination year 2026-27 has been released by the MSBSHSE, Maharashtra State Board. The board will hold the final examination at the end of the year following the annual assessment scheme, which has led to the release of the syllabus. The 2026-27 Maharashtra State Board 12th Standard Board Exam Computer Science 2 Board Exam will entirely be based on the most recent syllabus. Therefore, students must thoroughly understand the new Maharashtra State Board syllabus to prepare for their annual exam properly.

The detailed Maharashtra State Board 12th Standard Board Exam Computer Science 2 Syllabus for 2026-27 is below.

Academic year:

Maharashtra State Board 12th Standard Board Exam Computer Science 2 Revised Syllabus

Maharashtra State Board 12th Standard Board Exam Computer Science 2 Course Structure 2026-27 With Marking Scheme

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Syllabus

1 Introduction to Microprocessors and Organization of 8085 [Revision]
  • An Introduction to the Advanced Microprocessors  
    • Introduction
    • Microprocessor Specifications
    • Microcontroller
  • Microcomputer  
    • Introduction to Microcomputer 
    • Block Diagram of Microcomputer
  • Generic Microprocessor  
    • Arithmetic Logic Unit (ALU)
    • Several Registers
    • Program Counter 
    • Instruction Decoder
    • Timing and Control Section
    • Bus Buffers and Latches. 
    • Internal Buses and Control Lines 
    • Several Control Inputs and Outputs. 
    • Interrupt Control.
  • Functional Pin Diagram of 8085  
    • 8085 Microprocessor
    • Address Bus 
    • Multiplexed Address/Data Bus
    • Control and Status Signals. 
    • Power Supply and Frequency Signals.
    • Externally Initiated Signals.
    • Serial I/O Ports. 
    • Addressing I/O Devices
  • Functional Block diagram of 8085  
    • Three Types of Buses
    • Arithmetic and Logic Unit (ALU) 
    • Flags
    • Register
    • Interrupts 
    • Serial Input and Output
    • Program Counter 
    • Stack Pointer 
    • Incrementer-Decrementer 
    • Instruction Decoder
  • Addressing Modes  
    • Implied Addressing
    • Register Addressing
    • Immediate Addressing
    • Direct Addressing
    • Register Indirect Addressing
2 Instruction Set and Programming of 8085 [Revision]
  • Introduction to Set and Programming of 8085  
  • Instruction Cycle  
    • T State’s
    • Machine Cycle
  • Addressing Modes  
    • Implied Addressing
    • Register Addressing
    • Immediate Addressing
    • Direct Addressing
    • Register Indirect Addressing
  • Programming model of 8085  
  • Introduction to Classification of 8085  
    • Data Transfer Instruction 
    • Arithmetic Group Instructions 
    • Logical Group Instructions 
    • Branching Group Instructions 
    • Machine Control Instruction 
    • Instruction format 
  • How to Write and Execute Simple Assembly Language Program ?  
  • Data Transfer Instruction  
    • Move and MVI Instructions
    • LDAX - LOAD and STAX - STORE Accumulator Indirect
    • LDA - LOAD and STA - STORE Accumulator Direct 
    • LXI - LOAD Register Pair Immediate
    • LHLD - LOAD and SHLD - STORE H & L Register Direct
    • XCHG - Exchange H and L with D and E
    • 8-Bit Data Transfer Between Accumulator and I/O Ports
    • Writing and Executing a Simple Assembly Program
  • Arithmetic Group Instructions  
    • ADD - ADD (Add Register) ADI - ADD (Add Immediate) to Accumulator 
    • ADC - ADD (Add register with carry)  ACI - ADD (Add Immediate with carry) to Accumulator with carry 
    • SUB - SUBTRACT (Subtract register) SUI - SUBTRACT (Subtract Immediate) from Accumulator 
    • SUI - SUBTRACT (Subtract Register with Borrow) SBI - SUBTRACT (Subtract Immediate with Borrow)
    • INR - INCREMENT and INX - INCREMENT Contents of Register/Memory By 1
    • DCX-DECREMENT Register pair By 1
    • DAD-ADD Register Pair to H and L Registers 
    • DAA - Decimal Adjust Accumulator 
  • Logical Group Instructions  
    • ANA - LOGICAL and , ORA-LOGICAL or , XRA-EXCLUSIVE or  , CMP-COMPARE with accumulator
    • ANI - AND , ORI - OR , XRI - XOR , CPI - COMPARE Immediate with Accumulator
    • CMA - COMPLEMENT the Accumulator 
    • CMC - COMPLEMENT Carry 
    • STC-SET Carry 
    • RLC-ROTATE (Rotate Left) RRC-ROTATE (Rotate Right) 
    • RAL-ROTATE (Rotate Left Through Carry)  RAR - ROTATE (Rotate Right Through Carry)
  • Branching Group Instructions  
    • Conditional JUMP , CALL and RETURN Instructions 
    • Unconditional JUMP , CALL and RETURN Instructions 
    • RESTART Instructions - RST
    • Stack and Subroutine 
  • Machine Control Instruction  
    • PUSH - PUSH Register Pair On Stack 
    • POP - POP OFF Stack to Register Pair 
    • XTHL-EXCHANGE H and L With Top Of Stack 
    • SPHL - COPY H and L Register To SP 
    • SIM-SET and RIM-READ Interrupt Mask 
    • EI - ENABLE  Interrupt Instruction 
    • PCHL - LOAD Program Counter with HL Register Pair Contents 
    • NOP - NO Operation 
    • HLT - HALT and enter wait state 
3 Introdcution to Inted X-86 Family [Revision]
4 Introduction to Microcontroller [Revision]
5 Networking Technology [Revision]
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