Advertisements
Advertisements
प्रश्न
Draw the logic gate diagram for the reduced expression. Assume that the variables and their complements are available as inputs.
Advertisements
उत्तर
F(A,B,C,D) = (A+D) . ( C'+D) . (A'+B)
APPEARS IN
संबंधित प्रश्न
Differentiate between half adder and full adder. Write the Boolean expression and draw the logic circuit diagram for the SUM and CARRY of a full adder.
What is an encoder?
How is Encoder different from a decoder?
When a sequence of OR, NOT, NOR are connected in series, the logic gate obtained is ______.
Idempotence Law states that ______.
Draw the logic circuit for 3:8 decoder (Octal decoder). Which multiplexer can be derived from the Octal decoder?
Draw the logic circuit to decode the following binary number (0001, 0101, 0111, 1000, 1010, 1100, 1110,1111) to its hexadecimal equivalents. Also, state the Hexadecimal equivalents of the given binary numbers.
