University of Mumbai Syllabus For Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits: Knowing the Syllabus is very important for the students of Semester 7 (BE Fourth Year). Shaalaa has also provided a list of topics that every student needs to understand.
The University of Mumbai Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits syllabus for the academic year 2022-2023 is based on the Board's guidelines. Students should read the Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits Syllabus to learn about the subject's subjects and subtopics.
Students will discover the unit names, chapters under each unit, and subtopics under each chapter in the University of Mumbai Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits Syllabus pdf 2022-2023. They will also receive a complete practical syllabus for Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits in addition to this.
University of Mumbai Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits Revised Syllabus
University of Mumbai Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits and their Unit wise marks distribution
University of Mumbai Semester 7 (BE Fourth Year) Very Large Scale Integrated Circuits Course Structure 2022-2023 With Marking Scheme
Syllabus
- Introduction to VHDL hardware description language
- Core features of VHDL
- Data types
- Concurrent and sequential statements
- Data flow
- Behavioral, structural architecture.
- Architecture of Xilinx XC4000 FPGA family.
- Combinational and Sequential Logic design using VHDL.
- Using VHDL combinational circuit design examples- multipliers, decoders and encoders, cascading comparator.
- VHDL sequential circuit design features.
- Implementation of counters and registers in VHDL.
- Very Large Scale Integration (VLSI) Technology Physics of NMOS, PMOS
- Enhancement and depletion mode transistor
- MOSFET
- Threshold voltage
- Flatband condition
- Linear and saturated operation
- FET capacitance
- Short channel and hot electron effect.
- MOS Transistors
- MOS transistor switches
- Basic MOS inverter and its working
- Types of MOS invertors viz active load nMOS inverter
- MOSFET Inverter with EnMOS as pull up
- MOSFET Inverter with D- nMOS as pull up
- MOSFET Inverter with pMOS as pull up
- cmos inverter
- Voltage transfer characteristics
- Noise immunity and noise margins
- Power and area considerations
- Parameter measurement in MOS circuits.
- Silicon Semiconductor Technology Wafer processing
- Mask generation
- Oxidation
- Epitaxy growth diffusion
- Ion implantation
- Lithography
- Etching
- Metalization
- Basic NMOS and PMOS processes.
- Latch up in CMOS and CMOS using twin tub process.
- Scaling of MOS circuits
- Types of scaling and limitations of scaling.
- Design rules and Layout
- NMOS and CMOS design rules and layout
- Design of NMOS and CMOS inverters
- NAND and NOR gates
- Interlayer contacts
- Butting and buried contacts
- Stick diagrams
- Layout of inverter
- NAND and NOR gates.
- Design of basic VLSI circuits
- Design of circuits like multiplexer, decoder, priority encoder, Flip flops, shift registers using MOS circuits.
