University of Mumbai Syllabus For Semester 5 (TE Third Year) Microprocessors: Knowing the Syllabus is very important for the students of Semester 5 (TE Third Year). Shaalaa has also provided a list of topics that every student needs to understand.
The University of Mumbai Semester 5 (TE Third Year) Microprocessors syllabus for the academic year 2022-2023 is based on the Board's guidelines. Students should read the Semester 5 (TE Third Year) Microprocessors Syllabus to learn about the subject's subjects and subtopics.
Students will discover the unit names, chapters under each unit, and subtopics under each chapter in the University of Mumbai Semester 5 (TE Third Year) Microprocessors Syllabus pdf 2022-2023. They will also receive a complete practical syllabus for Semester 5 (TE Third Year) Microprocessors in addition to this.
University of Mumbai Semester 5 (TE Third Year) Microprocessors Revised Syllabus
University of Mumbai Semester 5 (TE Third Year) Microprocessors and their Unit wise marks distribution
University of Mumbai Semester 5 (TE Third Year) Microprocessors Course Structure 2022-2023 With Marking Scheme
# | Unit/Topic | Weightage |
---|---|---|
100 | Intel 8086/8088 Architecture | |
200 | Instruction Set And Programming | |
300 | System Designing With 8086 | |
400 | Intel 80386DX Processor | |
500 | Pentium Processor | |
600 | SuperSPARC Architecture | |
Total | - |
Syllabus
- 8086/8088 Microprocessor Architecture
- Pin Configuration
- Programming Model
- Memory Segmentation
- Study of 8284 Clock Generator
- Operating Modes
- Study of 8288 Bus Controller, Timing diagrams for Read and Write operations, Interrupts.
- Instruction Set of 8086, Addressing Modes, Assembly Language Programming, Mixed Language Programming with C Language and Assembly Language.
- Memory Interfacing:- SRAM, ROM and DRAM (using DRAM ControllerIntel 8203).
- Applications of the Peripheral Controllers namely 8255PPI, 8253PIT, 8259PIC and 8237DMAC.
- Interfacing of the above Peripheral Controllers with 8086 microprocessor.
- Introduction to 8087 Math Coprocessor and 8089 I/O Processor.
- Study of Block Diagram, Signal Interfaces, Bus Cycles, Programming Model, Operating Modes, Address Translation Mechanism in Protected Mode, Memory Management, Protection Mechanism.
- Block Diagram, Superscalar Operation, Integer & Floating Point Pipeline Stages, Branch Prediction, Cache Organization.
- Comparison of Pentium 2, Pentium 3 and Pentium 4 Processors.
- Comparative study of Multi core Processors i3, i5 and i7.
- SuperSPARC Processor, Data Formats, Registers, Memory model.
- Study of SuperSPARC Architecture.