University of Mumbai Syllabus For Semester 4 (SE Second Year) Logic Circuits: Knowing the Syllabus is very important for the students of Semester 4 (SE Second Year). Shaalaa has also provided a list of topics that every student needs to understand.

The University of Mumbai Semester 4 (SE Second Year) Logic Circuits syllabus for the academic year 2022-2023 is based on the Board's guidelines. Students should read the Semester 4 (SE Second Year) Logic Circuits Syllabus to learn about the subject's subjects and subtopics.

Students will discover the unit names, chapters under each unit, and subtopics under each chapter in the University of Mumbai Semester 4 (SE Second Year) Logic Circuits Syllabus pdf 2022-2023. They will also receive a complete practical syllabus for Semester 4 (SE Second Year) Logic Circuits in addition to this.

## University of Mumbai Semester 4 (SE Second Year) Logic Circuits Revised Syllabus

University of Mumbai Semester 4 (SE Second Year) Logic Circuits and their Unit wise marks distribution

### University of Mumbai Semester 4 (SE Second Year) Logic Circuits Course Structure 2022-2023 With Marking Scheme

# | Unit/Topic | Weightage |
---|---|---|

C | Module 1 | |

101 | Introduction | |

102 | Binary Codes | |

103 | Boolean Algebra Logic Gates | |

CC | Module 2 | |

201 | Combinational Circuits | |

CCC | Module 3 | |

301 | Combinational Logic Circuit Design | |

302 | Use of Multiplexers in Logic Design | |

CD | Module 4 | |

401 | Sequential Logic Circuits | |

D | Module 5 | |

501 | Registers | |

502 | Memories | |

DC | Module 6 | |

601 | Logic Families | |

Total | - |

## Syllabus

### University of Mumbai Semester 4 (SE Second Year) Logic Circuits Syllabus for Module 1

- Number system, Binary, Octal, Hexadecimal and other.
- Conversion from One system to another, Binary, BCD and Hexadecimal.
- Binary Arithmetic (addition, subtraction, multiplication, division) Hexadecimal and octal arithmetic, first and second complement methods.

- Weighted Reflective
- Sequential, Gray
- Error detecting codes
- Odd
- Even parity
- Hamming Codes
- Alphanumeric
- Morse
- Teletypewriter ASCII
- EBCDIC codes
- Converting Binary to Gray & Gray to Binary
- Conversion from BCD to XS3
- Application of gray code, shaft position encoding.

- AND, OR, NOT, XOR, XNOR, operation NAND, NOR used of the universal gate for Performing different operation.
- Laws of Boolean algebra.
- De- Morgan‘s theorems.
- Relating a Truth Table to a Boolean Expression.
- Multi level circuits.

### University of Mumbai Semester 4 (SE Second Year) Logic Circuits Syllabus for Module 2

- K-MAPS and their use in specifying Boolenan Expressions.
- Minterm, Maxterm SOP and POS Implementation.
- Implementation a logic function using universal gates.
- Variable entered maps For five and six variable functions Quine Mc Clusky tabular techniques.

### University of Mumbai Semester 4 (SE Second Year) Logic Circuits Syllabus for Module 3

- Designing code converter circuits e.g. Binary to Gray, BCD to Seven Segments, Parity Generator.
- Binary Arithmetic circuits:- Adders, Subtractors ( Half and full ) BCD adder- Subtractor, carry Lookaheard adder, Serial adder, Multiplier Magnitude Comparators, 7485 comparator, Arithmetic Logic units.

- Multiplexer (ULM) Shannon‘s theorem.
- ULM trees.
- De- Multiplexers
- Line decoders
- Designing using ROMs and ULMs
- Hazards in combinational circuits.

### University of Mumbai Semester 4 (SE Second Year) Logic Circuits Syllabus for Module 4

- Comparison of Combinational & Sequential Circuits
- Multi-vibrators (Astable, Monostable And Bistable) Flip-Flops
- SR, T, D, JK, Master Slave JK
- Converting one Flip-Flop to another
- Use of Denounce switch
- Counter Modulus of a counter
- Ripple counter
- Up/Down Counter
- Designing sequential counters using gate IC and counter IC by drawing state transition Diagram & state transition table.
- Ring counter Johnson counter, twisted ring counter
- Pseudo Random number generator
- Unused states and locked conditions.

### University of Mumbai Semester 4 (SE Second Year) Logic Circuits Syllabus for Module 5

- Serial input serial output.
- serial input parallel output.
- Left Right shift register.
- Use of register ICs for sequence generator and counter.
- Bidirectional shift register.

- RAM, ROM the basic cell IC bipolar, CMOS, RAM dynamic RAM cell.
- Magnetic core NVRAM, bubble memory, CCD, PAL, PLA.

### University of Mumbai Semester 4 (SE Second Year) Logic Circuits Syllabus for Module 6

- RTL, DTL, TTL, schotkey clamped TTL, Tristate gate ECL, IIL, MOS device CMOS Comparison of logic families, interfacing different families.
- TTL with CMOS, NMOS, TTL, ECL, & TTL, IIL, & TTL.